A practical guide to low power efficiency measurements

When performing measurements on DC/DC converters utilizing PFM, proper care must be taken to ensure that the measurements are accurate. Due to the nature of a converter operating in the PFM mode, its test setup is different from that of a converter operating in the PWM mode. In fact, an improper test setup can result in incorrect efficiency measurement data that varies considerably from data sheet specifications. This article discusses PFM mode and how it helps to maintain high efficiencies at light loads. It also provides guidelines to assist the engineer in acquiring accurate efficiency measurements

Pulse Frequency Modulation
Pulse Frequency Modulation is a switching method commonly used in DC/DC voltage converters to improve efficiency at light loads. This method is also referred to as burst mode and power save mode (PSM). There is one primary advantage that PSM has over traditional PWM schemes: it reduces the power dissipation of the converter at light loads.

A switching converter has two types of power losses: static and dynamic. Static losses are constant, regardless of load current. Alternatively, dynamic losses increase with load current. An example of a static loss is the quiescent current going into an IC. This current is used to power internal circuitry such as bandgap references, operational amplifiers (op amps), internal clocks, etc. In turn, dynamic losses can be classified by two categories: conduction losses and switching losses. Conduction losses are load dependent and include losses caused by voltage drops across a power supply's power MOSFETs and inductor. Higher load currents result in higher conduction losses. A converter also has frequency dependent switching losses that include the MOSFETs' turn-on and turn-off losses, gate drive losses, and body diode losses that occur each switching cycle. As the name implies, these losses are proportional to the switching frequency. Most of these losses are also dependent on load. Figure 1 shows the static and dynamic power losses for low-power ICs. This figure shows that dynamic losses are dominant at higher output currents, while static losses are dominant at lower output currents.

Figure 1. Comparison of a switcher's static versus dynamic losses

Page 2: Power Save Modes
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