Output capacitor
As shown in Figs. 1 and 2a, the per-phase inductor currents are summed at the output capacitor/output voltage terminal node. We assume that the AC and DC components of the resultant current flow in the load, and filter capacitor, respectively. Equations 3 and 4 describe the expected ripple currents produced by the single-phase and multiphase buck converter circuits. The output capacitor's peak-to-peak ripple currents are plotted in Fig. 6 for two to four phases. The values are normalized with respect to the ripple current at zero duty cycle, i.e. Vo/Lf fs.
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Fig. 6: Normalized output capacitor ripple current (N =1, 2, 3, 4)
The output current ripple current attenuation factor—which we denote by KICout,pk-pk—can be quantified by the ratio of Eq. 3 to Eq. 4 as:
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 Eq. 10
This parameter is plotted in Fig. 7.
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Fig. 7: Ripple current attenuation factor (N =2, 3, 4)
Figures 6 and 7 indicate duty cycle operating points akin to Fig. 5 where the output capacitor ripple current is largely eliminated. If the duty cycle satisfies Eq. 8, the capacitor current amplitude effectively reduces to zero and the capacitor ripple current disappears. Does this mean an output capacitor is not required in this situation? From the standpoint of ripple current, yes. However, cancellation of ripple current will never be perfect due to nonidealities and circuit parasitics. More important, the load current step-change during a load transient implies that the output capacitor is required to supply the net charge imbalance while the control loop responds. Of course, the loop will adjust the duty cycle to meet the transient demand and the zero-ripple condition will no longer be true. Thus, an output capacitance is still required as an energy reservoir to meet the transient demand and limit the resultant voltage deviation.
However, the reduced ripple current over the full duty cycle range, combined with the effective frequency multiplication, yields an automatic advantage for the multiphase solution in terms of reduced output capacitance. The higher frequency enables the output capacitance bank to be most effectively implemented using an all-ceramic low ESR, low ESL capacitor implementation. Thus the solution is smaller, lower profile and less expensive, and obviates the need for electrolytic capacitors that are traditionally bulky and less reliable.
The expression for the output filter capacitor RMS current as a function of duty cycle is given by Eq. 11, where iCout,pk-pk is the peak-to-peak of the triangular wave current in the capacitor, given by Eq. 4.
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 Eq. 11
The output capacitor's ESR power dissipation is given by Eq. 12:
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 Eq. 12
Again, ESR power dissipation is substantially reduced in the multiphase topology by virtue of reduced component RMS current.
Optimizing transient response
The maximum inductor current slew rate, neglecting nonidealities, during a load-on transient is constrained by the topology. The slew rate is given by:
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 Eq. 13
Similarly, the maximum slew rate during a load-off transient is given by:
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 Eq. 14
If we assume adequate loop bandwidth, and if the load transient demand is faster than defined above, the output capacitor is required to handle the charge surplus or deficit and there will be a deviation in output voltage that occurs as a result of the load transient.
As mentioned previously, however, the multiphase buck converter's output capacitance benefits from ripple current cancellation coupled with higher effective fundamental frequency. Effectively, the output ripple can still be within specification even if larger ripple currents exist. Accordingly, it is possible to significantly reduce the per-phase filter inductance, Lf, the only caveat being increased per-phase ripple current and increased high-side FET turn-off switching loss. Thus, faster current slew rates by virtue of lower inductances are possible with multiphase converters, leading to improved transient response for a given loop bandwidth.
The technical literature describes numerous advantages related to magnetically coupling the filter inductances to create one integrated magnetic device. This can provide size and cost benefits and, with proper magnetic design, the effective inductance during a transient can be reduced while simultaneously maximizing the equivalent inductance during steady-state conditions. Thus, transient response can be enhanced without the downside of increased per-phase ripple current and FET switching loss.
Thermal management
Each buck cell processes 1/N of the total power, reducing the size of the associated magnetics and power semiconductors. Duplicating the power stages improves efficiency and distributes the thermal loading to create a uniform thermal profile minimizing hotspots. This yields manageable temperature increases, especially important with relatively low thermal conductivity substrates such as FR4 based PC boards. At light loads, individual phases can be disabled to reduce semiconductor switching losses and optimize the number of operational phases to attain minimum overall power loss.
The reduced height of the design and increased silicon surface area improve forced convection performance and downgrade the requirement for heatsinks or thermal spreaders. Reduced semiconductor junction temperature and passive component hotspot temperature improve overall reliability and MTBF while lower magnetic core temperature maintains a larger safety margin against thermally induced magnetic saturation.
Component design
The multichannel approach enables the use of smaller footprint power train components amenable to automated manufacturing processes. These parts may be more cost-effective with easier component procurement and availability and typically are already exploited in lower current designs. Paralleling of power devices—usually mandatory in single-phase designs if higher currents are required—is not necessary, reducing component connection related parasitics. The physical layout of smaller components on the PC board yields more packaging flexibility. Finally, smaller and lighter components produce a mechanically robust solution in the presence of shock and vibration.
Experimental results
The benefits of multiphasing were evaluated experimentally by designing a PCB to incorporate National Semiconductor's LM20134 and LM20154 current-mode, synchronous 4-amp monolithic buck regulator ICs. The LM20134 and LM20154 are provided with sync-in and sync-out synchronization features, respectively. The interleaved configuration, deployed as in Fig. 8, is capable of providing a net output current of 8 amps.
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Fig. 8: Interleaved two-phase buck regulator
The LM20134 sync (in) and the LM20154 sync (out) pins are connected. Thus, the LM20154 acts a master that provides a synchronization pulse to compel the LM20134 slave to operate with 180° phase difference. The switching frequency (1 MHz) is governed by the free-running frequency of the LM20154.
Figure 9 shows the measured individual inductor currents with circuit operating conditions set at Vin = 4.5, Vo = 1.8 and Io = 8. With the duty cycle at 45 percent, the ripple current cancellation and a 2-MHz ripple component are readily observed.
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Fig. 9: Inductor current, total unfiltered output current of two-phase interleaved regulator
Figure 10 shows the input capacitor current given the same circuit operating conditions. The same measurement is made when two LM20154 regulator ICs are operating in phase to produce an equivalent output current level. As expected, there is a substantially lower ripple current with the interleaved solution relative to in-phase operation.
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Fig. 10: Comparing measured input capacitor currents, interleaved vs. in-phase operation
References
1. National Semiconductor, LM20134 datasheet, http://www.national.com/pf/LM/LM20134.html.
2. National Semiconductor, LM20154 datasheet, http://www.national.com/pf/LM/LM20154.html.
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