During high-frequency load transients, conventional multiphase switching regulators experience large beat-frequency oscillations of its phase currents. These beat-frequency components most often result in additional electrical and thermal stresses on power devices. We can reduce these stresses, achieve current balancing for any load frequencies higher or lower than the switching frequency and cut EMI by applying transient frequency modulation (TFM)—which uses a PWM modulator, frequency modulator, and load-transient detector—in place of the standard PWM modulator circuitry (Fig. 1). Here's how it works to improve your design.
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Figure 1: Basic TFM topology for switching regulators
Overview
High-performance microprocessors require a low-voltage, high-current power source with fast transient response. Interleaved multiphase synchronous buck converters generally serve this need while reducing output voltage ripple and cutting cost, especially when it comes to input and output capacitors.
When it comes to system stability and small-signal analysis of an interleaved converter, the system is totally characterized by the total current flowing through an equivalent inductance and the voltage drop across the output capacitor [1]. Actually, it's equivalent to a single-phase DC/DC converter where the coil is replaced by all the parallel inductors (equivalent inductor). The equivalent switching frequency is n times the single-phase switching frequency, where n is the number of phases.
This model demonstrates why it is possible to implement a faster control system with much higher gain bandwidth product (GBWP) than a single-phase system. This configuration helps to keep the output voltage stable and well regulated, even during load transients. During fast load transients, however, good voltage regulation is not the controller's only requirement; it's also necessary to control each phase current and current sharing. Current balancing is well controlled for load frequencies lower than the switching frequency, but very strong current oscillations can be observed when the load frequency approaches the switching frequency. At that point, electrical stresses (maximum peak current in power MOSFETs, magnetic saturation of the inductor core) are high. Many controllers implement constant-current per phase protection circuitry, which controls the maximum peak current per phase. But when the protection is enabled, the output voltage may drop.
Operation
Beat-frequency oscillations are the result of the modulation between PWM sampling and the main output load harmonic. Given the controller's switching frequency (fSW), the load frequency (fLOAD), the number of phases (N), and the feedback loop constants (KV and KCS), we can calculate the beat-frequency oscillations (fXX+ and fXX-) at the output and the inductor currents. For the voltage loop (multiphase topology), the beat frequencies are (Eq. 1):
fAV ± = N fSW ± KV fLOAD
For the current-sharing loop, the frequencies are (Eq. 2):
fACS ± = fSW ± KCS fLOAD
The current-sharing loop and the voltage loop do not modify the PWM pulse spectrum, but fit the beat frequency according to their own gain-bandwidth product. In a traditional multiphase controller, we can assume the gain-bandwidth product for the voltage loop and the current loop are (Eqs. 3):
GBWPAV = NfSW/10
GBWPACS = fSW/5
We can assume that the high beat frequencies (fAV+ and fACS+) do not perturb [2] the voltage regulation because it is out of the GBWP (Fig. 2), whereas the low beat frequencies (fAV- and fACS-) go into the very low frequencies, where these harmonics modify the output voltage and inductor currents. Figure 3 shows a typical three-phase application where fSW = 280 kHz and fLOAD = 288 kHz. According to the beat theory, for KV = 3 and KCS = 1, the resulting beat frequencies are fAV = 24 kHz, and fACS = 8 kHz, respectively.
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Figure 2: Load spectrum at fLOAD and PWM spectrum for the voltage and current-sharing loops
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Figure 3: Output voltage and inductor currents for fSW = 280 kHz and fLOAD = 288 kHz
When the beat frequency in the current-sharing loop goes to zero, a static current unbalancing occurs, resulting in thermal unbalancing between phases (Fig. 4). This unbalancing can damage the power stage, such as the high-side MOSFET. It is thus necessary to cancel fAV and fACS.
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Figure 4: Static current imbalance at fACS = 0
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