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Optimize data-center power delivery architecture

Careful design fields maximum efficiency and minimum operating costs

Page 1 of 4

Power Management DesignLine

Recent years have seen a continued surge in the number of active data centers containing potentially hundreds of thousands of low voltage, high current microprocessors. The overall power consumption of a data center can easily exceed 1MW. Power used by servers (including cooling and auxiliary infrastructure) was 1.2% of total US electricity demand in 2005 and cost $2.7B which can only increase as data volume doubles every 12-18months. Additionally, consolidation techniques such as virtualization - reaching 25% of x86-based servers by 2010 - contribute to the spread of larger data centers.

This high power consumption, especially in light of initiatives to increase overall datacenter efficiency, necessitates a study of efficiency within the rack system itself from the AC input to the rack to the low voltage high current loads (typically Microprocessors and Memory).

The ability to limit power consumption is further complicated by continuing evolution in the computing industry. Shrinking processes used in the fabrication are leading to lower microprocessor core voltages, with many product roadmaps indicating that by 2010 the core voltage will be at 0.8V. Also multi-core architectures are driving the total power consumption of a blade or motherboard higher, with new blades exceeding 1kW of power consumption within the next decade.

From these two developments it becomes clear that a datacenter power delivery architecture must be both optimized for efficiency and to maintain high power density. For most power delivery architectures these two requirements are fundamentally opposed to each other: increasing efficiency increases the size of a power component and decreasing the size lowers the efficiency.

What follows is an analysis of four architectures for power delivery from the AC input to the rack to the sub-volt loads with benchmarks in terms of efficiency, power density, total cost of ownership and scalability

For each of the following architectures, the system assumptions are summarized in Table 1.


Table 1: System assumptions for power architecture comparison.
(Click this image to view a larger, more detailed version)

Some additional system assumptions are made which are mentioned below:

  1. Light load / no load operation is equivalent for each architecture.
  2. Low Voltage High current losses are negligible.
  3. The blade does not include high current loads above 1.5V.
  4. Redundant feeds / architectures are not considered.



Page 2: Architecture Comparison  

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